Wafer Processing

Bump/cap forming is a process whereby solder interconnect material is being formed on a wafer either on UBM to form solder bumps or onto copper pillars bump to create solder caps.

Wafer bumping is the process of forming a solder bump interconnect material on a wafer either through solder paste technology or solder sphere attach technology with flux and solder balls.

Advanced electronic applications often require temporary bonding materials for various wafer processing, thin wafer handling, wafer backside grinding, SAW and crystal oscillator processing, stiffener ring attach as well as various other temporary bonding/processing aides.

Hybrid bonding is enabling advanced packaging by solving scaling issues related to Cu-Sn interconnect. These issues solved by Hybrid bonding include elimination highly coplanar pillars, solder bridging, opens and poor interconnect reliability.

TSV copper electroplating solves 2.5D/3D integration issues allowing chips of different functions to be packaged together for higher performance.

Pillar / post developments for flip chip, bumping and mega pillars continue to enable heterogenous integration driven by finer pitch for high density interconnections.

RDL is for rerouting I/O’s for package connections. Redistribution layers in 2.5D integration with passive interposers allows for communication between various chips.

Under bump metallization, serves as a barrier layer for high reliability solder joints and elimination of electromigration concerns in flip chip copper pillar.

Backside metallization for frontside interconnect and heatsink on gallium nitride (GaN) and gallium arsenide (GaAs).

Wafer fabrication products enable the formation of interconnects at Back End of the Line (BEOL) within IC wafer fabrication sequences.