IMAPS Device Packaging Conference 2024

WeKoPa Resort and Conference Center

Fountain Hills
United States
Trade Show
Discover how to enhance the reliability and performance of integrated circuits in semiconductor manufacturing with MacDermid Alpha’s innovative wafer level packaging and semiconductor assembly technologies which will be presented during our two papers at the IMAPS 20th Annual Device Packaging Conference. Discuss your pain points with our technology experts at booth #13-14.
IMAPS 2024
IMAPS 2024

Enhance Device Reliability 

Abdelhamid ElSawy, Senior Research and Development Scientist at MacDermid Alpha will present ‘Exploring the Engineering of Copper Grains to Electroplate Bamboo-Like Structures and Foster Cu (111) Oriented Films in Pursuit of Enhanced Device Reliability’ at 3:00 PM on Tuesday, March 19th during the Heterogenous 2D & 3D Integration Track: Hybrid CU Bonding and Materials session.

In semiconductor manufacturing, precisely controlling copper (Cu) grain size and orientation within vias is pivotal for ensuring integrated circuit reliability. This paper provides a comprehensive study and invaluable insights into the precise manipulation of copper grain size and orientation using the bamboo process, holding significant promise for enhancing the reliability of integrated circuits in semiconductor manufacturing.


Improve Solderability Yield

Frank Xu, Technology Manager – Final Finishes at MacDermid Alpha, will present, ‘An Innovative OSP Surface Finish for IC Substrate Packaging Applications’ at 11:30 am on Thursday, March 21st during the Fan-Out, Wafer Level Packaging & Flip Chip Track: Flip Chip Technology session.

When it comes to successful soldering, Organic Solderability Preservative (OSP) coatings play a crucial role, especially in the packaging arena. This paper aims to shed light on the significance of OSP coatings in safeguarding copper surfaces and improving solderability yield. It explains the interplay between coatings, cleaning agents, and other variables that dictate the effectiveness of OSP. 


Leading Edge Technology 

Are you looking to optimize high first-pass yields, thermal management, and the electrical performance of your semiconductor assembly? Visit our experts at booth #13-14 to discuss how our leading-edge technology can benefit your wafer level packaging application by enabling complex designs and the lowest total cost of ownership.

Our experts will also be on hand to discuss our proven solutions for IC Substrates including our Systek™ line of IC substrate chemicals which provide solutions for the most technically challenging high-density designs.

The IMAPS 20th Annual Device Packaging Conference (DPC 2024) is a major forum for the exchange of knowledge and provides numerous technical, social, and networking opportunities for meeting leading experts in these fields. The technical program will span four days of sessions with an emphasis on heterogeneous 2D and 3D integration, fan-out, wafer/panel level and flip chip packaging, and next-gen applications.

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