IMAPS 56th International Symposium on Microelectronics
Pingping Ye, Senior Research and Development Scientist at MacDermid Alpha will present the paper, ‘Transforming WLP Applications: Introducing Cutting-Edge Next Generation Nanotwinned Copper Processes to Revolutionize Hybrid Bonding’ at 2.15pm on Tuesday October 3, during the Wafer Level/Panel Level (Advanced RDL) track in the Town & Country Ballroom A.
The paper will assess two electrochemical plating approaches for hybrid bonding applications. Both approaches produce stable nt-Cu structures with minimal transition layers when electroplated on (111) Cu substrate. However, grain size, transition layer thickness on polycrystalline substrates, and feature-filling behavior differ. The paper will investigate which criteria should be considered when choosing between the two approaches, including size, aspect ratio, and application.
Frank Xu, Technology Manager at MacDermid Alpha, will present ‘A Comprehensive Study of Surface Finishes for High Frequency/High Speed Applications’ at 10.15am on Wednesday October 4, during the Advanced Process & Materials (Enabling Technologies) track in the Town & Country Ballroom D.
The paper will discuss the use of various surface finishes including standard ENEPIG, Thinner EN ENEPIG’s, EPIG (no EN) as well Immersion Silver, OSP and a new Ag/Au surface finish and their effect on high frequency applications.
The introduction of 5G/6G has created growing demand for faster rates of data transfer and operation at higher frequencies, pushing signals to travel towards the outer edges of conductors. Therefore, the surface finish applied over the copper circuitry is gaining more attention.
Xu will present the findings of comprehensive studies looking at signal loss, solder joint reliability testing (ball shear, drop shock, electromigration) and other critical quality performance data.
The 56th International Symposium on Microelectronics will feature 5 technical tracks, plus an interactive poster session. The technical program will span three days of sessions with emphasis on SiP/Design/Manufacturing Optimization; Wafer Level/Panel Level (Advanced RDL); High Performance/High Reliability; Advanced Package (Flip Chip, 2.5D, 3D, Optical); and Advanced Process & Materials (Enabling Tech.)
Register Here: https://imaps.org/page/IMAPS2023